Electronics Weekly

Avnet opens Xilinx Zynq design workshops

Registration is now open for a series of interactive SpeedWay Design Workshops to help engineers jump-start the development of single-core Xilinx Zynq-7000 All Programmable SoC devices using the Avnet ...
EDN

Isolation Design Flow for Xilinx 7 Series FPGAs or Zynq-7000 AP SoCs

This application note describes how to implement security- or safety-critical designs using the Xilinx® Isolation Design Flow (IDF) with the Xilinx Vivado® Design Suite. Design applications include ...
Design-Reuse

Aldec's TySOM Family of Embedded System Development Solutions Now Supports Xilinx PYNQ (Python Productivity for Zynq)

Henderson, USA – October 26, 2020 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has added PYNQ Python Productivity for Zynq ...
Design-Reuse

Xilinx Accelerates Productivity for Zynq-7000 All Programmable SoCs with the Vivado Design Suite 2014.3, SDK, and New UltraFast Embedded Design Methodology Guide

SAN JOSE, Calif. -- Oct. 8, 2014 -- Xilinx, Inc. (NASDAQ: XLNX) today announced major advances in productivity for Zynq®-7000 All Programmable SoCs with the Vivado® Design Suite 2014.3, the ...
EDN

Reference Design: Powering the Zynq Evaluation and Development Board (ZedBoard)

This reference design explains how to power the Xilinx Zynq Extensible Processing Platform (EPP) and peripheral ICs using Maxim’s power-supply solutions. Abstract: This reference design explains how ...
Electronic Design

ASSET offers test and programming tools for Xilinx Zynq-7000 SoC

Richardson, TX. ASSET InterTech announced it is offering test and programming tools that will accelerate development and production cycles for designs based on Xilinx Zynq-7000 SoCs. These new tools, ...