As clock speeds in communications systems push into the GHz range, phase noise and jitter ” always key issues in analog designs ” are becoming increasingly critical to the performance of digital chips ...
The SKY63104/5/6 family of jitter attenuating clocks and SKY62101 clock generators are the industry’s first clock devices that can simultaneously generate Ethernet and PCI Express® (PCIe) spread ...
This application note details the design of a complete 12GHz, ultra-low phase noise fractional-N phase locked loop (PLL) with external VCO. It consists of a high performance fractional-N PLL (MAX2880) ...
TOKYO--(BUSINESS WIRE)--Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today introduced the ClockMatrix 2 high-performance, precision, ...
Spacecraft timing systems must provide highly stable, precise signals for navigation, communications and scientific instruments, even when GNSS signals are weak or unavailable. Designers frequently ...
Sonet, SDH, ATM, and WAN applications are the main targets for the RFX300 series (rfXO) of high-performance RF crystal oscillators. The devices feature just 3-ps RMS jitter, 0.5-ps phase jitter, and ...
Whether you are sitting at a computer, working on a tablet, talking or surfing on a cell phone, sending data over a network, performing digital signal analysis, or controlling an industrial robot, ...
More than 10 years ago, the frequency control industry introduced PLL-based (phase-locked loop) oscillators, an innovation that pioneered several features previously unavailable with traditional ...
The PCIe, or Peripheral Component Interconnect Express standard, has been around for nearly 20 years. It was an upgrade to the earlier PCI bus, developed by Intel and introduced in 1992. The bus ...
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