Hackaday

Logic Analyzers For FPGAs: A Verilog Odyssey

Sometimes you start something simple and then it just leads to a chain reaction of things. I wanted to write a post about doing state machines in Verilog and target the Lattice iCEstick board that we ...
EDN

FPGA design tool bypasses VHDL coding

CoDeveloper, a C language design tool for Altera Nios-based and Xilinx MicroBlaze-based programmable platforms, allows creation of a complete hardware/software application with no need to write VHDL ...
Linux Journal

Icarus Verilog: Open-Source Verilog More Than a Year Later

About 16 months ago, in the February 2001 Linux Journal [see www.linuxjournal.com/article/4428], we reviewed the state of open source in electronic design automation ...